Abstract
The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counterpiracy
I. INTRODUCTION
The need to ascribe a unique binary signature to an integrated circuit (IC) has applications in digital design and embedded systems, ranging from digital rights management, IP protection, cryptographic key generation, device authentication,
and IC counterfeit detection/prevention.
An artifact of state-of-the-art sub-100 nm IC manufacturing is that random variations in doping concentrations, line widths, or other properties cause unpredictable variations in transistor speed and interconnect.
(page 1 col 2)
Field-programmable gate arrays (FPGAs) are programmable chips that can be con“gured by the end-user to implement any digital circuit.
II. RELATED WORK
A. Physically Unclonable Functions
Fig. 1(b) shows an arbiter PUF, comprising two parallel nstage
multiplexer chains feeding a flip-flop.
The PUF designs described above are not specifically targeted
to FPGAs; they can equally be implemented within custom
chips.
Consider the dynamic clocked behavior of the circuit in
Fig. 3.
B. Xilinx Virtex-5 FPGAs
(page 3)
C. LUTs as Memories and Shift Registers
In most applications, LUTs are used to implement combinational
logic functions, in which case the LUT’s SRAMcell contents
is programmed during device configuration and remains
unchanged thereafter
III. PROPOSED DESIGN
We propose an FPGA PUF circuit that, based on random
process variations, will produce either a logic-0 or logic-1.
(page 3 col 2)
There are two cases worth highlighting
We use the presense/absense of a positive spike on N2 to
determine a PUF signature bit
(The Virtex-5 SLICE has an architectural restriction that only a
single clock signal may be used in any given SLICE.)
Although the delay differences due to process variations may
trigger a short pulse on signal N2 as shown in Fig. 3, the pulse
width may be so short that it is “filtered out” on its way along
the routing path to the flip-flop preset input.
(p4)
With the goal of managing pulse width in mind, we note that
the position of LUT B in the SLICE can be tailored to create
a meaningful PUF.
